| m |  |
Professor, Texas A&M University Department of Electrical & Computer Engineering |
m |  |
| mHOME | mRESEARCH | mTEACHING | mPUBLICATIONS | mCONTACT |
 |
Publications For a comprehensive list of more recent publications, please see my Google Scholar page.
High-Speed Electrical & Optical Links
S. Cai, E. Zhian Tabasy, A. Shafik, S. Kiran, S. Hoyos, and S. Palermo, "A 25GS/s 6b TI Binary Search ADC with Soft-Decision Selection in 65nm CMOS," submitted to 2015 IEEE Symposium on VLSI Circuits.
O. Elhadidy, A. Roshan-Zamir, H.-W. Yang, and S. Palermo, "A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR Tap DFE Receiver in 65-nm CMOS," submitted to 2015 IEEE Symposium on VLSI Circuits.
K. Yu, C.-H. Chen, C. Li, H. Li, A. Titriku, B, Wang, A. Shafik, Z. Wang, M. Fiorentino, P. Chiang, and S. Palermo, "25Gb/s Hybrid-Integrated Silicon Photonic Receiver with Microring Wavelength Stabilization," accepted in 2015 OSA Optical Fiber Communication Conference.
A. Shafik, E. Zhian Tabasy, S. Cai, K. Lee, S. Hoyos, and S. Palermo, "A 10Gb/s Hybrid ADC-Based Receiver with Embedded 3-Tap Analog FFE and Dynamically-Enabled Digital Equalization in 65nm CMOS," accepted in 2015 International Solid-State Circuits Conference.
K. Yu, H. Li, C. Li, A. Titriku, B, Wang, A. Shafik, Z. Wang, R. Bai, C.-H. Chen, M. Fiorentino, P. Chiang, and S. Palermo, "A 24Gb/s, 0.71pJ/b, Si-Photonic Source-Synchronous Receiver with Adaptive Equalization and Microring Wavelength Stabilization," accepted in 2015 International Solid-State Circuits Conference.
H. Li, Z. Zuan, A. Titriku, K. Yu, B, Wang, N. Qi, A. Shafik, C. Li, M. Fiorentino, M. Hochberg, S. Palermo, and P. Chiang, "A 25Gb/s 4.4V Swing AC-Coupled Si-Photonic Microring Transmitter with 2-Tap Asymmetric FFE and Dynamic Thermal Tuning in 65nm CMOS," accepted in 2015 International Solid-State Circuits Conference.
S. Kiran, S. Hoyos, and S. Palermo, "A Single Parity Check Forward Error Correction Method for High Speed I/O," IEEE Global Conference on Signal and Information Processing, Dec. 2014.
Y.-H. Song, H.-W. Yang, H. Li, P. Chiang, and S. Palermo, "An 8-16Gb/s, 0.65-1.05pJ/b, Voltage-Mode Transmitter with Analog Impedance Modulation Equalization and sub-3ns Power-State Transitioning," IEEE Journal of Solid-State Circuits, Nov. 2014.
E. Zhian Tabasy, A. Shafik, K. Lee, S. Hoyos, and S. Palermo, "A 6b 10GS/s TI-SAR ADC with Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications," IEEE Journal of Solid-State Circuits, Nov. 2014.
S. Cai, A. Shafik, S. Kiran, E. Zhian Tabasy, S. Hoyos, and S. Palermo, "Statistical Modeling of Metastability in ADC-Based Serial I/O Receivers," IEEE Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 2014.
C. Li, C.-H. Chen, B. Wang, S. Palermo, M. Fiorentino, and R. Beausoleil, "Design of an Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter," IEEE Design and Test of Computers, Sept/Oct. 2014.
O. Elhadidy and S. Palermo, "A 10 Gb/s 2-IIR-Tap DFE Receiver with 35 dB Loss Compensation in 65-nm CMOS," SRC Techcon, Sept. 2014.
B. Min, N. H.-W. Yang, and S. Palermo, "10Gb/s Adaptive Receive-Side Near-End and Far-End Crosstalk Cancellation Circuitry," IEEE International Midwest Symposium on Circuits and Systems, Aug. 2014.[Best Student Paper Award].
C. Li, R. Bai, A. Shafik, E. Zhian Tabasy, B. Wang, G. Tang, C. Ma, C.-H. Chen, P. Zhen, M. Fiorentino, R. Beausoleil, P. Chiang, and S. Palermo, "Silicon Photonic Transceiver Circuits with Microring Resonator Bias-Based Wavelength Stabilization in 65-nm CMOS," IEEE Journal of Solid-State Circuits, June 2014.
H. Li, S. Chen, L. Yang, R. Bai, W. Hu, F. Zhong, S. Palermo, and P. Chiang, "A 0.8V, 560fJ/bit, 14Gb/s Injection-Locked Receiver with Input DCD Tolerable Edge-Rotating 5/4X Sub-Rate CDR in 65nm CMOS," IEEE Symposium on VLSI Circuits, June 2014.
A. Titriku, C. Li, A. Shafik, and S. Palermo, "Efficiency Modeling of Tuning Techniques for Silicon Carrier Injection Ring Resonators," IEEE Optical Interconnects Conference, May 2014.
C.-H. Chen, C. Li, A. Shafik, M. Fiorentino, P. Chiang, S. Palermo, and R. Beausoleil, "A WDM Silicon Photonic Transmitter based on Carrier-Injection Microring Modulators," IEEE Optical Interconnects Conference, May 2014.
Y.-H. Song, H.-W. Yang, H. Li, P. Chiang, and S. Palermo, "An 8-16Gb/s, 0.65-1.05pJ/b, 2-Tap Impedance-Modulated Voltage-Mode Transmitter with Fast Power-State Transitioning in 65nm-CMOS," IEEE International Solid-State Circuits Conference, Feb. 2014.
R. Bai, S. Palermo, and P. Chiang, "A 0.25pJ/b, 0.7V, 16Gb/s 3-Tap Decision-Feedback Equalizer in 65nm CMOS," IEEE International Solid-State Circuits Conference, Feb. 2014.
C.-H. Chen, C. Li, R. Bai, A. Shafik, M. Fiorentino, P. Chiang, S. Palermo, and R. Beausoleil, "Integrated DWDM Silicon Photonic Transceiver with Self-Adaptive CMOS Circuits for Chip-to-Chip Optical Interconnects," SPIE Photonics West, Feb. 2014.
E. Zhian Tabasy, A. Shafik, S. Huang, N. Yang, S. Hoyos, and S. Palermo, "A 6b 1.6GS/s ADC with Redundant Cycle 1-Tap Embedded DFE in 90nm CMOS," IEEE Journal of Solid-State Circuits, Aug. 2013.
A. Palaniappan and S. Palermo, "A Design Methodology for Power Efficiency Optimization of High-Speed Equalized-Electrical I/O Architectures," IEEE Transactions on Very Large Scale Integration Systems, Aug. 2013.
O. El-Hadidy and S. Palermo, "A 10 Gb/s 2-IIR-Tap DFE Receiver with 35 dB Loss Compensation in 65-nm CMOS," IEEE Symposium on VLSI Circuits, June 2013.
E. Zhian Tabasy, A. Shafik, K. Lee, S. Hoyos, and S. Palermo, "A 6b 10GS/s TI-SAR ADC with Embedded 2-Tap FFE/1-Tap DFE in 65nm CMOS," IEEE Symposium on VLSI Circuits, June 2013.
E. Zhian Tabasy, A. Shafik, S. Huang, N. Yang, K. Lee, S. Hoyos, and S. Palermo, "Multi-GS/s CMOS ADCs With Efficient Embedded Equalization for Wireline Communications," SRC Techcon, June 2013. [Best in Session Award].
Y.-H. Song and S. Palermo, "A 0.47-0.66 pJ/bit, 4.8-8 Gb/s I/O Transceiver in 65nm CMOS," SRC Techcon, June 2013.
Y. Song, R. Bai, K. Hu, H.-W. Yang, P. Chiang, and S. Palermo, "A 0.47-0.66pJ/bit, 4.8-8Gb/s I/O Transceiver in 65nm-CMOS," IEEE Journal of Solid-State Circuits, May 2013.
C. Li and S. Palermo, "A Low-Power 26-GHz Transformer-Based Regulated Cascode SiGe BiCMOS Transimpedance Amplifier," IEEE Journal of Solid-State Circuits, May 2013.
C.-H. Chen, C. Li, R. Bai, A. Shafik, M. Fiorentino, Z. Peng, P. Chiang, S. Palermo, and R. Beausoleil, "Hybrid Integrated DWDM Silicon Photonic Transceiver with Self-Adaptive CMOS Circuits," IEEE Optical Interconnects Conference, May 2013.
C. Li, R. Bai, A. Shafik, E. Zhian Tabasy, G. Tang, C. Ma, C.-H. Chen, Z. Peng, M. Fiorentino, P. Chiang, and S. Palermo, "A Ring-Resonator-Based Silicon Photonics Transceiver with Bias-Based Wavelength Stabilization and Adaptive-Power-Sensitivity Receiver," IEEE International Solid-State Circuits Conference, Feb. 2013.
E. Zhian Tabasy, A. Shafik, S. Huang, N. Yang, S. Hoyos, and S. Palermo, "A 6b 1.6GS/s ADC with Redundant Cycle 1-Tap Embedded DFE in 90nm CMOS," IEEE Custom Integrated Circuits Conference, Sep. 2012.
B. Min, K. Lee, and S. Palermo, "A 20Gb/s Triple-Mode (PAM-2, PAM-4, and Duobinary) Transmitter," Microelectronics Journal, Oct. 2012.
K. Hu, R. Bai, T. Jiang, C. Ma, A. Ragab, S. Palermo, and P. Chiang, "0.16-0.25pJ/bit, 8Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking," IEEE Journal of Solid-State Circuits, Aug. 2012.
Y. Song and S. Palermo, "A 6Gb/s Hybrid Voltage-Mode Transmitter with Current-Mode Equalization in 90nm CMOS," IEEE Transactions on Circuits and Systems-II, Aug. 2012.
A. Ragab, Y. Liu, K. Hu, P. Chiang, and S. Palermo, "Receiver Jitter Tracking Characteristics in High-Speed Source Synchronous Links," Journal of Electrical and Computer Engineering, 2011.
A. Shafik, K. Lee, E. Zhian Tabasy, and S. Palermo, "Embedded Equalization for ADC-Based Serial I/O Receivers," IEEE Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 2011.
C. Li and S. Palermo, "A Low-Power, 26-GHz Transformer-Based Regulated Cascode Transimpedance Amplifier in 0.25um SiGe BiCMOS," IEEE Bipolar/BiCMOS Circuits and Technology Meeting, Oct. 2011.
K. Hu, T. Jiang, S. Palermo, and P. Chiang, "Low-Power 8Gb/s Near-Threshold Serial Link Receivers Using Super-Harmonic Injection Locking in 65nm CMOS," IEEE Custom Integrated Circuits Conference, Sept. 2011.
B. Min and S. Palermo, "A 20Gb/s Triple-Mode (PAM-2, PAM-4, and Duobinary) Transmitter," IEEE International Midwest Symposium on Circuits and Systems, Aug. 2011.
I. Young, E. Mohammed, J. Liao, A. Kern, S. Palermo, B. Block, M. Reshotko, and P. Chang, "Optical Technology for Energy Efficient I/O in High Performance Computing," IEEE Communications Magazine, Oct. 2010.
A. Palaniappan and S. Palermo, "Power Efficiency Modeling and Optimization of High-Speed Equalized-Electrical I/O Architectures," IEEE Conference on Electrical Performance of Electronic Packaging and Systems, Oct. 2010.
A. Palaniappan and S. Palermo, "Power Efficiency Comparisons of Interchip Optical Interconnect Architectures," IEEE Transactions on Circuits and Systems II, May 2010.
I. Young, E. Mohammed, J. Liao, A. Kern, S. Palermo, B. Block, M. Reshotko, and P. Chang, "Optical I/O Technology for Tera-Scale Computing," IEEE Journal of Solid-State Circuits, Jan. 2010.
I. Young, E. Mohammed, J. Liao, A. Kern, S. Palermo, B. Block, M. Reshotko, and P. Chang, "Optical I/O Technology for Tera-Scale Computing," IEEE International Solid-State Circuits Conference, Feb. 2009. [Outstanding Technology Directions Paper Award].
S. Palermo, A. Emami-Neyestanak, and M. Horowitz, "A 90nm CMOS 16Gb/s Transceiver for Optical Interconnects," IEEE Journal of Solid-State Circuits, May 2008.
E. Mohammed, J. Liao, A. Kern, D. Lu, H. Braunisch, T. Thomas, S. Hyvonen, S. Palermo, and I. Young, "An Optical Hybrid Package with an 8-channel 18GT/s CMOS Transceiver for Chip-to-Chip Optical Interconnect," SPIE Photonics West, Jan. 2008.
J. Roth, S. Palermo, N. Helman, D. Bour, D. Miller, and M. Horowitz, "An Optical Interconnect Transceiver at 1550nm using Low Voltage Electroabsorption Modulators Directly Integrated to CMOS," IEEE-OSA Journal of Lightwave Technology, Dec. 2007.
S. Palermo, A. Emami-Neyestanak, and M. Horowitz, "A 90nm CMOS 16Gb/s Transceiver for Optical Interconnects," IEEE International Solid-State Circuits Conference, Feb. 2007.
J. Roth, S. Palermo, N. Helman, D. Bour, D. Miller, and M. Horowitz, "1550nm Optical Interconnect Transceiver with Low Voltage Electroabsorption Modulators Flip-Chip Bonded to 90nm CMOS," IEEE-OSA Optical Fiber Communications Conference, Feb. 2007.
S. Palermo and M. Horowitz, "High-Speed Transmitters in 90nm CMOS for High-Density Optical Interconnects," IEEE European Solid-State Circuits Conference, Sep. 2006.
A. Emami-Neyestanak, S. Palermo, H. Lee, and M. Horowitz, "CMOS Transceiver with Baud Rate Clock Recovery for Optical Interconnects," IEEE Symposium on VLSI Circuits, June 2004.
H. Lee, C. Yue, S. Palermo, K. Mai, and M. Horowitz, "Burst Mode Packet Receiver using a Second Order DLL," IEEE Symposium on VLSI Circuits, June 2004.
V. Gurumoorthy and S. Palermo, "Supply Regulation Techniques for Phase-Locked Loops," IEEE Dallas Circuits and Systems Workshop, Oct. 2009.
D. Miller, A. Bhatnagar, S. Palermo, A. Emami-Neyestanak, and M. Horowitz, "Opportunities for Optics in Integrated Circuits Applications," IEEE International Solid-State Circuits Conference, Feb. 2005.
S. Palermo and J. Pineda de Gyvez, "A Multi-Band Single-Loop PLL Frequency Synthesizer with Dynamically-Controlled Switched Tuning VCO", IEEE Midwest Symposium on Circuits and Systems, Aug. 2000.
C. Briseno-Vidrios, A. Edward, A. Shafik, S. Palermo, and J. Silva-Martinez, "A 75 MHz 68dB DR CT-DS Modulator with MFB SAB and Low Power TIA Summing Node," submitted to 2015 IEEE Symposium on VLSI Circuits.
N. Narku-Tetteh, A. Titriku, and S. Palermo, "A 15b, Sub-10ps Resolution, Low Dead Time, Wide Range Two-Stage TDC," IEEE International Midwest Symposium on Circuits and Systems, Aug. 2014.
J. Zhou, S. Palermo, J. Silva-Martinez, and S. Hoyos, "Asynchronous Compressive Radar," Government Microcircuit Applications & Critical Technology Conference, Apr. 2014.
E. Zhian Tabasy, M. Kamarei, S. Ashtiani, and S. Palermo, "Sequential Correlated Level Shifting: A Switched-Capacitor Approach for High-Accuracy Systems," IEEE Transactions on Circuits and Systems-II, Dec. 2013.
J. Zhou, S. Palermo, B. Sadler, and S. Hoyos, "Asynchronous Compressive Sensing in Radar Systems," IEEE MTT Texas Symposium on Wireless and Microwave Circuits and Systems, Apr. 2013.
X. Chen, E. Sobhy, Z. Yu, S. Hoyos, J. Silva-Martinez, S. Palermo, and B. Sadler, "A Sub-Nyquist Rate Compressive Sensing Data Acquisition Front-End," IEEE Journal of Emerging and Selected Topics in Circuits and Systems, Sept. 2012.
J. Zhou, M. Ramirez, S. Palermo, and S. Hoyos, "Digital-Assisted Asynchronous Compressive Sensing Front-End," IEEE Journal of Emerging and Selected Topics in Circuits and Systems, Sept. 2012.
S. Hoyos, S. Pentakota, Z. Yu, E. Sobhy, X. Chen, R. Saad, S. Palermo, and J. Silva-Martinez, "Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach," IEEE Transactions on Circuits and Systems I, Feb. 2011.
O. Elhadidy, S. Shakib, K. Krenek, S. Palermo, and K. Entesari, "A Wide-Band Fully-Integrated CMOS Ring-Oscillator PLL-Based Complex Dielectric Spectroscopy System," submitted to IEEE Transactions on Circuits and Systems-I.
R. Jay and S. Palermo, "Resonant Coupling Analysis for a Two-Coil Wireless Power Transfer System," IEEE Dallas Circuits and Systems Conference, Oct. 2014.
O. Elhadidy, S. Shakib, K. Krenek, S. Palermo, and K. Entesari, "A 0.18-um CMOS Fully Integrated 0.7-6 GHz PLL-Based Complex Dielectric Spectroscopy System," IEEE Custom Integrated Circuits Conference, Sept. 2014.
O. El-Hadidy, M. Elkholy, A. A. Helmy, S. Palermo, and K. Entesari, "A CMOS Fractional-N PLL-Based Microwave Chemical Sensor with 1.5% Permittivity Accuracy," IEEE Transactions on Microwave Theory and Techniques, Sept. 2013.
H. Huang and S. Palermo, "A TDC-Based Front-End for Rapid Impedance Spectroscopy," IEEE International Midwest Symposium on Circuits and Systems, Aug. 2013.
V. Sekar, W. Torke, S. Palermo, and K. Entesari, "A Self-Sustained Microwave System for Dielectric Constant Measurement of Lossy Organic Liquids," IEEE Transactions on Microwave Theory and Techniques, May 2012.
V. Sekar, W. Torke, S. Palermo, and K. Entesari, "A Novel Approach for Dielectric Constant Measurement Using Microwave Oscillators," IEEE International Microwave Symposium, June 2011.
C. Li, M. Browning, P. Gratz, and S. Palermo, "LumiNOC: A Power-Efficient, High-Performance, Photonic Network-on-Chip," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, June 2014.
C. Li, M. Browning, P. Gratz, and S. Palermo, "LumiNOC: A Power-Efficient, High-Performance, Photonic Network-On-Chip for Future Parallel Architectures," International Symposium on Networks-on-Chip, Apr. 2013.
C. Li, M. Browning, P. Gratz, and S. Palermo, "LumiNOC: A Power-Efficient, High-Performance, Photonic Network-on-Chip for Future Parallel Architectures," International Conference on Parallel Architectures and Compilation Techniques, Sep. 2012.
C. Li, M. Browning, P. Gratz, and S. Palermo, "Energy-Efficient Optical Broadcast for Nanophotonic Networks-on-Chip," IEEE Optical Interconnects Conference, May 2012.
B. Provost, S. Palermo, E. Sanchez-Sinencio, and S.H.K. Embabi, "Built-In Self Test for Pipeline ADCs," IEEE International Workshop on Design of Mixed-Mode Integrated Circuits and Applications, July 1998.
C. Li, P. Gratz, and S. Palermo, "More than Moore Technologies for Next Generation Computer Design," Chapter 7: Nano-Photonic Networks-on-Chip for Future Chip Multiprocessors, Springer, 2015.
R. Saad, S. Hoyos, and S. Palermo, "MATLAB - A Fundamental Tool for Scientific Computing and Engineering Applications - Volume 1," Chapter 17: Analysis and Modeling of Clock-Jitter Effects in Delta-Sigma Modulators, Intech, 2012.
S. Palermo, "CMOS Nanoelectronics Analog and RF VLSI Circuits," Chapter 9: High-Speed Serial I/O Design for Channel-Limited and Power-Constrained Systems, McGraw-Hill, 2011.
A. Titriku, "Efficient Wavelength Tuning Techniques for Integrated Silicon Photonics," M.S. Thesis, Texas A&M University, Dec. 2014.
Y.-H. Song, "Design Techniques for Energy Efficient Multi-Gb/s Serial I/O Transceivers," Ph.D. Dissertation, Texas A&M University, May 2014.
C. Li, "Design of Optical Interconnect Transceiver Circuits and Network-on-Chip Architectures for Inter- and Intra-Chip Communication," Ph.D. Dissertation, Texas A&M University, Dec. 2013.
H. Huang, "Impedance Spectroscopy Front-End Suitable for Biomedical Cell Impedance Measurement," M.S. Thesis, Texas A&M University, May 2013.
K. Lee, "High-Speed Link Modeling: Analog/Digital Equalization and Modulation Techniques," M.S. Thesis, Texas A&M University, May 2012.
W. Torke, "A PLL-Based Frequency Shift Measurement System for Chemical and Biological Sensing," M.S. Thesis, Texas A&M University, Dec. 2011.
Y. Liu, "Jitter Tracking Bandwidth Optimization Using Active-Inductor-Based Bandpass Filtering in high-Speed Forwarded Clock Transceivers," M.S. Thesis, Texas A&M University, May 2011.
A. Palaniappan, "Modeling, Optimization and Power Efficiency Comparison of High-Speed Inter-Chip Electrical and Optical Interconnect Architectures in Nanometer CMOS Technologies," M.S. Thesis, Texas A&M University, Dec. 2010.
S. Palermo, "Design of High-Speed Optical Interconnect Transceivers," Ph.D. Thesis, Stanford University, Sep. 2007.
S. Palermo, "A Multi-Band Phase-Locked Frequency Synthesizer," M.S. Thesis, Texas A&M University, Aug. 1999.
R. Payne, C. Chan, and S. Palermo, "High Speed Voltage Mode Differential Digital Output Driver with Edge-Emphasis and Pre-Equalization," U.S. Patent #6,624,670, Issued September 23, 2003.
|
m | |