Daniel A. Jiménez
I'm a Professor in the
Computer Science and Engineering Department at
Texas A&M University.
My research is in microarchitecture and the interaction
between the compiler and the microarchitecture.
I've done a lot of work in branch prediction and cache management. I'm known for inventing the
perceptron branch predictor as well as for other research. I was elevated to IEEE Fellow in 2021 for my work in branch prediction. I recently won the B. Ramakrishna Rau award "for contributions to neural branch prediction in microprocessors."
Before I came to Texas A&M I was Professor and Department Chair in the CS department at UT San Antonio. Before that, I was an Associate Professor (with tenure) in the CS department at Rutgers. My Ph.D. in Computer Sciences is from UT Austin. I grew up in San Antonio, Texas. I'm a dual citizen of the USA and Mexico.
For a detailed list of professional things I've done, see my CV.
Also see my Google Scholar page.
FOR PROSPECTIVE STUDENTS
I won't be taking on any new students in Fall 2024 or Spring 2025 as I will be on sabbatical leave. So please don't send me email asking to join my lab.
Teaching
Fall 2023: CSCE 312: Computer Organization
Fall 2022: CSCE 614: Computer Architecture
Spring 2022: CSCE 312: Computer Organization
Click here for more teaching.
Selected Publications
-
Tanvir Ahmed Khan, Muhammed Ugur, Krishnendra Nathella, Dam Sunwoo,
Heiner Litz, Daniel A. Jiménez, and Baris Kasikci, Whisper:
Profile-Guided Branch Misprediction Elimination for Data Center
Applications, Proceedings of the 55th ACM/IEEE International
Symposium on Microarchitecture (MICRO-55), Chicago, Illinois,
October 2022. Won the Best Paper Award. (pdf).
-
Georgios Vavouliotis, Gino Chacon, Lluc Alvarez, Paul Gratz, Daniel A.
Jiménez, and Marc Casas, Page Size Aware Cache Prefetching,
Proceedings of the 55th ACM/IEEE International Symposium on
Microarchitecture (MICRO-55), Chicago, Illinois, October 2022.
(link).
- Georgios Vavouliotis, Lluc Alvarez, Vasileios Karakostas, Konstantinos
Nikas, Nectarios Koziris, Daniel A. Jiménez, and Marc Casas,
Exploiting Page Table Locality For TLB Prefetching, Proceedings of
the 47th International Symposium on Computer Architecture (ISCA-2021),
June 2021
(pdf).
- Brian Grayson, Jeff Rupley, Gerald Zuraski Jr., Eric Quinnell, Daniel A. Jiméenez, Tarun Nakra, Paul Kitchin, Ryan Hensley, Edward Brekelbaum, Vikas Sinha, and Ankit Ghiya,
Evolution of the Samsung Exynos CPU Microarchitecture, Proceedings of the 47th International Symposium on Computer Architecture (ISCA 2020), Valencia, Spain, May/June 2020 (pdf).
- Elba Garza, Samira Mirbagher, Tahsin Ahmad Khan, Daniel A. Jiménez, Bit-Level Perceptron Prediction for Indirect Branch Prediction, Proceedings of the 46th International Symposium on Computer Architecture (ISCA 2019), Phoenix, AZ, June 2019 (pdf).
- Eshan Bhatia, Gino Chacon, Elvira Teran, Seth Pugsley, Paul Gratz, Daniel A. Jiménez, Perceptron-Based Prefetch Filtering,
Proceedings of the 46th International Symposium on Computer Architecture (ISCA 2019), Phoenix, AZ, June 2019.
- Samira Mirbagher Ajorpaz, Elba Garza, Sangam Jindal and Daniel A. Jiménez,
Exploring predictive replacement policies for instruction cache and branch target buffer, Proceedings of the 45th International Symposium on Computer Architecture (ISCA 2018), Los Angeles, CA, June 2018. (pdf).
- Daniel A. Jiménez and Elvira Teran, Multiperspective Reuse Prediction, Proceedings of The 50th Annual IEEE/ACM International Symposium on
Microarchitecture (MICRO-2017), Boston, MA, October 2017. (pdf).
- Jinchun Kim, Elvira Teran, Paul V. Gratz, Daniel A. Jiménez, Seth H. Pugsley, and Chris Wilkerson, Kill the Program Counter: Reconstructing Program Behavior at the Last Level Cache, Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2017), Xi'an, China, April 2017. (pdf).
- Elvira Teran, Zhe Wang, and Daniel A. Jiménez, Perceptron Learning for Reuse Prediction, Proceedings of The 49th Annual IEEE/ACM International Symposium on
Microarchitecture (MICRO-2016), Taipei, Taiwan, October 2016.
(pdf).
- Elvira Teran, Yingying Tian, Zhe Wang, and Daniel A. Jiménez, Minimal Disturbance Placement and Promotion, Proceedings of the 22nd International Symposium on High Performance Computer Architecture (HPCA-22), Barcelona, Catalunya, March 2016.
(pdf).
- Daniel A. Jiménez, Insertion and Promotion for Tree-Based
PseudoLRU Last-Level Caches, Proceedings of the 46th Annual IEEE/ACM
International Symposium on Microarchitecture (MICRO-46), Davis,
California, December 2013
(pdf).
- Zhe Wang, Samira M. Khan, Daniel A. Jiménez, Improving
Writeback Efficiency with Decoupled Last Write Prediction, Proceedings
of the 39th International Symposium on Computer Architecture (ISCA-39),
Portland, Oregon, June 2012
(pdf).
- Samira M. Khan, Zhe Wang, Daniel A. Jiménez,
Decoupled Dynamic Cache Segmentation, Proceedings of
the 18th International Symposium on High Performance Computer
Architecture (HPCA-18), New Orleans, Louisiana, February 2012
(pdf).
- Zhe Wang, Daniel A. Jiménez, Program
Interferometry Proceedings of the 2011 International IEEE
International Symposium on Workload Characterization (IISWC),
pp. 172--183, Austin, Texas, November 2011
(pdf).
- Daniel A. Jiménez, An Optimized Scaled Neural Branch
Predictor, Proceedings of the 2011 IEEE International Conference
on Computer Design (ICCD), Amherst, Massachusetts, October 2011
(pdf).
- Samira M. Khan, Yingying Tian, Daniel A. Jiménez, Dead
Block Replacement and Bypass with a Sampling Predictor, Proceedings of
the 43rd International Symposium on Microarchitecture (MICRO-43), Atlanta,
Georgia, December 2010
(pdf).
- Samira Khan, Daniel A. Jiménez, Doug Burger and Babak Falsafi,
Using Dead Blocks as a Virtual Victim Cache, Proceedings of the
2010 International Conference on Parallel Architectures and Compilation
Technologies (PACT-2010), Vienna, Austria, September, 2010
(pdf).
- Renée St. Amant, Daniel A. Jiménez and Doug
Burger, Low-Power, High-Performance Analog Neural Branch
Prediction, Proceedings of the 41st Annual International Symposium
on Microarchitecture (MICRO-41), Lake Como, Italy, November 2008.
(pdf) (C++ code)
- Miquel Pericàs, Adrian Cristal, Francisco J. Cazorla,
Ruben González, Alex Veidenbaum, Daniel A. Jiménez
and Mateo Valero, A Two-Level Load/Store Queue Based on
Execution Locality, Proceedings of the 35th International
Symposium on Computer Architecture (ISCA-35), June 2008
(pdf)
- Daniel A. Jiménez, Piecewise Linear Branch Prediction,
Proceedings of the 32nd International Symposium on Computer Architecture
(ISCA-32), June 2005
(ps.gz)
(pdf)
- Daniel A. Jiménez, Code Placement for Improving Dynamic Branch
Prediction Accuracy, Proceedings of the ACM SIGPLAN 2005 Conference
on Programming Language Design and Implementation (PLDI), June, 2005
(ps.gz)
(pdf)
- Daniel A. Jiménez,
Idealized Piecewise Linear Branch Prediction,
The 1st JILP Championship Branch Prediction Competition (CBP-1), December, 2004 (co-located with MICRO 37)
(ps.gz)
(pdf)
(Introductory PowerPoint slides from CBP)
(Powerpoint slides for the predictor)
- Daniel A. Jiménez, Fast Path-Based Neural Branch Prediction,
Proceedings of the 36th Annual International Symposium on Microarchitecture
(MICRO-36), San Diego, CA, December 2003.
(ps.gz)
(pdf)
(Java source code)
- Daniel A. Jiménez, Reconsidering Complex Branch Predictors,
Proceedings of the Ninth International Symposium on High Performance
Computer Architecture (HPCA-9), Anaheim, CA, February 2003.
(ps.gz)
(pdf)
Click here for an out-of-date "full" list of publications.
News
Education
For Graduate Students Interested in my Classes
Yes, there will be programming. I teach Computer Science. There is a lot of programming in Computer Science. If you don't like programming you shouldn't be taking my class.
Quotes
I have collected a few interesting quotes here.
Links
Here are some interesting links:
-
The Comp.Theory FAQ
I had a hand in writing this FAQ list for the newsgroup
comp.theory . My stuff is where it
says "the rest of this section was written by Daniel Jimenez."
-
Amy Marquez
This is my sister's web site. She is a high-tech worker of some kind in Seattle, Washington and would be appalled at this abomination I call a web page.