ISA Power
Doubling I-cache reduces cache misses up to 50%
For on-chip cache or memory, 32-bit data path is provided
- Doubles the fetch bandwidth
Using ISS, capture the frequency of execution of all instructions and order the opcodes accordingly (control unit design): could save 15% of power
System-level power saving
- Wait: disable only CPU
- Doze: CPU plus some peripheral & clocks
- Stop: deep power down state with stopping all clocks, reduced to off most supply voltages