Some basic approaches

• Compiled Model:

  • very fast processor models are achievable in principle by translating the executable embedded software specification into native code for processor doing simulation. (Ex: Code for programmable DSP can be translated into Sparc assembly code for execution on a workstation)
  • No hardware, software execution provides timing details on interface to cosimulation.
  • Fastest alternative, accuracy depends on interface information.

ASIC

Model

(VHDL Simulation)

(Backplane)

Software compiled

for native code

of the host

Program

running on

host

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