Assumptions
1. The precedences between the tasks are specified as a DAG (G = (N, A)). The throughput constraints on the SDF graph translates to a deadline constraint D, I.e., the execution time of the DAG should not exceed D clock cycles.
2. Target architecture: programmable processor and custom datapath. These components have constraints.
- Software: program and data size, AS - memory capacity. Hardware has maximum size AH.
3. Communication cost of interface: ahcomm = hardware area such as glue logic interface, ascomm = software area the code size for send/rec, tcomm = #cycles to transfer data.