Table of Contents
Power Issues with Embedded Systems
Plan for today
Next Generation Computing: Watts metrics?
Power Aware
Physics Revisited
Impact on embedded system
Opportunities for Low-Power
Some Power Models
Empirical
Information Theoretic
Signal Model Based
Software Power
Instruction Level Power Modeling
Power Dissipation in CMOS
Switching Power Dissipation
Low-Power Techniques
Short Circuit Power Dissipation
Leakage Power Dissipation
Static Power
Power – Delay Leverage
Algorithmic Technique PR
Architectural Technique PR
Logic and Circuit Level PR
Logic circuit PR
Logic circuit PR
Logic Circuit Reording
Logic circuit Clocking
Logic Circuit Clocking
Logic Circuit Pre-computation
Device Technology
Case Study: MCORE ISA
ISA & Power
ISA Power
Microarchitecture PR
Clock distribution
Two-level clock distribution
Adapting power consumption profile to application and system needs
IBM’s power simulator
UCI’s Copper Project framework for power management
Summary
Revisit Processor Architecture
Architecture Revisited
Architecture Revisited
ILP & Power
Delay Elimination & Power
Prediction & Speculation
More on speculation
Data speculation
Power Issues
|