Table of Contents
Hardware Software Codesign of Embedded System
Today’s topics
Course Organization
Course organization: Gradings
Course policies
Topics to be covered (order and details may change)
Texts & References
Reading assignment
Introduction
Microelectronics trends
Microelectronics trends
Digital Systems
Digital Systems
Hardware/Software Codesign
Concurrent design
Codesign motivation
Story of IP cores
Story of IP cores
IP core reuse
Hardware Programmability
FPGAs
FPGAs
FPGAs
Why codesign?
Why codesign?
Why codesign?
Distinguishing features of digital system
Application Domains
Application Domains
Embedded System
Embedded Systems
Degree of Programmability
Degree of Programmability: Accessibility
Degree of Programmability: Accessibility
Degree of Programmability: Accessibility
Degree of Programmability: Accessibility
Degree of Programmability
Example 2.
Level of Programmability
Level of Programmability
Level of programmability
Programmability
Programmability
Performance and Programmability
Performance and Programmability
Performance and Programmability
Performance and Programmability
Programmability and Cost:ASIPs
Hardware Technology
Hardware Technology: FPGAs
Level of Integration
Embedded System Design Objective
Codesign of ISA
Codesign of ISA
Challenges with ASIP
Typical codesign process
Steps in Codesign
Steps in codesign
Modeling style
Steps in codesign
Steps in codesign
Partitioning and Scheduling (where and when)
Summary: Research areas in codesign
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