In this talk single-pattern spectral associative memories (SAMs) will be presented for encoding and decoding sampled analog and digital data over noisy channels. Unlike conventional associative memories, in which patterns are stored as long-term non-volatile attractors in a synaptic weight matrix, spectral memories are manifested as attractor waves that may be transmitted over a noisy channel to a spectral neural decoder. Data patterns, or "codewords" encoded into the attractor wave by associative amplitude modulation (spectral spread, similar to diffraction but in the frequency domain) may be recalled by recurrent associative amplitude demodulation (spectral focus) at the decoder. Coding gain occurs at the level of modulation; thus, these networks may be thought of as multi-channel, multi-carrier modem-codecs. Temporary basins of attraction are set up in the spectral decoder that force the recall of one of the encoded memory patterns and disappear when transmission of the attractor wave ceases. For multiple transmitted digital patterns, the content addressable feature may be exploited, but for simple telecommunication applications, single patterns may be encoded and transmitted one at a time with spurious-free recall. This work may be expressed in Dirac notation in which there are computational analogs of "entanglement" and non-local connectivity that results from (factorable) spectral attractors formed from single patterns without interference. Non-local connectivity is made virtually in the frequency domain allowing both encoder and decoder to scale linearly with pattern dimension, as opposed to geometric scaling in the conventional, spatial implementations. Both digital and analog memories are possible, and "Bremsstrahlung", which accompanies analog memory recall, is prevented. Complex, in-phase, and quadrature coding schemes will be presented along with anti-aliasing constraints for memory formation and recall. Bit error rates (BER) will be given for various signal-to-noise ratios (SNRs), data rates, and computational oversampling, and the design of an analog implementation in a .35 micron double-poly quadruple-metal n-well CMOS process will be presented.